Senior FPGA Engineer - Low Latency Trading

About the role

Architect, develop, verify, and deploy FPGA systems for ultra-low-latency trading, optimizing RTL, datapaths, timing, and hardware performance. Collaborate with trading, software, and hardware teams to support production systems, troubleshoot issues, and improve reliability. Requires at least three years of FPGA or digital hardware engineering experience, including at least two years of hands-on Verilog development, plus strong knowledge of digital design, timing, FPGA toolchains, and AMD/Xilinx or Intel/Altera platforms. Candidates should also understand SoC and memory architectures, networking fundamentals, verification, simulation, and hardware debugging; low-latency trading experience and SystemVerilog are advantageous.